Update Context SmartNICs

proto/context-ext-smartnics.proto

@@ -15,14 +15,13 @@
 // References:
 // https://www.nvidia.com/content/dam/en-zz/Solutions/networking/ethernet-adapters/connectX-6-dx-datasheet.pdf
 // converged accel: https://www.nvidia.com/content/dam/en-zz/Solutions/gtcf21/converged-accelerator/pdf/datasheet.pdf
-
 // bluefield-2 = connectX-6 + DPUs
 // conv_accel = bluefield-2 + GPU
 
 syntax = "proto3";
 package context-ext-smartnics;
 
-import context;
+import "context";
 import "kpi_sample_types.proto";
 
 message SmartnicsCapabilities {
@@ -75,7 +74,7 @@ enum DpuCoreArchitectureEnum {
 
 message DPU_Core {
     string model = 1; // Armv8 A72
-    enum   DpuCoreArchitectureEnum architecture = 2; 
+    DpuCoreArchitectureEnum architecture = 2; 
     uint64 l2_cache_size_mb = 3;
     uint64 l3_cache_size_mb = 4;
 }
@@ -83,8 +82,8 @@ message DPU_Core {
 message DPU_Memory {
     string RamMemoryType = 1; //On-Board DDR4
     string eMMCMemoryType = 2; //eMMC
-    enum DpuRamMemorySizeGB RamMemorySizeGB = 3; 
-    enum DpueMMCMemorySizeGB eMMCMemorySizeGB = 4; 
+    DpuRamMemorySizeGB RamMemorySizeGB = 3; 
+    DpueMMCMemorySizeGB eMMCMemorySizeGB = 4; 
 }
 
 enum DpuRamMemorySizeGB {
@@ -100,17 +99,6 @@ enum DpueMMCMemorySizeGB {
     DPU_MEMORY_eMMC_128GB = 3;
 }
 
-message GPU {
-    enum Architecture architecture = 1; //AMPERE?
-    enum ComputeCapabilities compute_capabilities = 2; //MIG?
-    uint64 memory_size_gb = 3; //24 GB HBM2
-    uint32 num_CUDA_cores = 4; //3804
-    uint32 num_Tensor_cores = 5; //224
-    uint32 peak_fp_32 = 6; //10.3TF
-    uint32 peak_fp_64 = 7; //5.2TF
-    uint32 peak fp_64_tensor_core = 8; //10.3TF
-}
-
 enum Architecture {
     ARCH_UNDEFINED = 0;
     ARCH_AMPERE = 1;
@@ -122,3 +110,16 @@ enum ComputeCapabilities {
     MIG_2_AT_12GB = 2;
     MIG_1_AT_24GB = 3;
 }
+
+
+message GPU {
+    Architecture architecture = 1; //AMPERE?
+    ComputeCapabilities compute_capabilities = 2; //MIG?
+    uint64 memory_size_gb = 3; //24 GB HBM2
+    uint32 num_CUDA_cores = 4; //3804
+    uint32 num_Tensor_cores = 5; //224
+    uint32 peak_fp_32 = 6; //10.3TF
+    uint32 peak_fp_64 = 7; //5.2TF
+    uint32 peak_fp_64_tensor_core = 8; //10.3TF
+}
+